As advancement in semiconductor integrated circuit (IC) technology continues to increase, packaging interconnection and integration will be strongly challenged to meet new standards. At the system level, the multi-chip module (MCM) technology contributes to making the processor smaller, faster, and easier to use. When designers take full advantage of MCM capability, overall cost reduction can often be realized when compared to the cost of the individual packaging components assembled. Increasing demands are emerging for higher performance and, therefore, requirements such as high bandwidths, lower packaging inductance, increased density, matched impedance, and shorter propagation delays must be met. Interconnection designs are using thin-film technology, including multi-layer thin-film (MLTF) structures, to address these requirements.
Thin-film structures are composed of metal and dielectric layers comprising, among other materials, copper and polyimide. Such structures are used in the microelectronics industry either to interconnect semiconductor devices (chips) or by themselves as thin-film connectors. The interconnect structure includes alternating layers of electrically insulating and conductive materials. Vias in the insulating material provide electrical connections between the conductor layers and bond pad terminations on semiconductor devices. The number of conductor layers depends on the signal routing, grounding, and shielding requirements for the interconnect.
A thin-film wiring layer can be fabricated in a variety of ways by conventional semiconductor processing techniques. For example, non-planar thin-film structures can be fabricated by subtractive etching or by pattern electroplating. Sputtered chrome-copper-chrome (Cr--Cu--Cr) metallurgy is used for subtractive etching. For wiring levels, a patterned resist is used to define the features and the Cr--Cu--Cr is chemically etched. Pattern electroplating wiring processes require the deposition of a thin chrome-copper metal seed followed by copper electroplating through a patterned resist. Subsequently, the photoresist is stripped and the seed is chemically etched.
The interconnect is fabricated on a standard processing substrate. Silicon, ceramic, glass, or polished metals can be used as the processing substrate. Once the multi-layer interconnect structure is complete, it is removed from the processing substrate to yield a free-standing film. Removal of the interconnect from the substrate can be accomplished by several different methods. Such methods include, for example, using a separating agent or release layer or chemically etching the substrate away. The completed interconnect is then electrically coupled to suitable electronic circuitry. Such coupling can be achieved using a variety of techniques including, for example wire bonding, solder reflow, thermal compression bonding, ultrasonic bonding, or laser bonding. The preferable technique depends upon the type of metal used for bond pad terminations and the stackup of the multi-layer structure.
The present invention focuses on removal of the interconnect from the processing substrate or carrier. An improvement in the process for producing MLTF structures is disclosed in U.S. Pat. No. 5,258,236, issued to Arjavalingam et al. and assigned to the assignee of the present invention. The '236 patent discloses building the MLTF structure as a "decal" on a transparent carrier. A polyimide layer is disposed between the MLTF structure and the carrier. The polyimide layer serves as a release layer to remove the MLTF structure from the carrier before joining the MLTF structure to a ceramic substrate. The release process disclosed is a laser ablation of the polyimide layer through the transparent substrate material.
Although the process of the '236 patent has proven successful in permitting simultaneous fabrication of the multi-layer thin-film interconnection structure and a ceramic substrate before the two are joined, it has certain limitations. Laser ablation must be performed over the whole surface area of the decal. Perhaps most important, an external frame must be attached to the MLTF structure decal before release from the carrier on which the decal is formed. The frame supports the MLTF structure decal after it is released. A relatively cumbersome alignment and lamination process, involving high-temperature adhesives, is required to attach the frame to the decal. In addition, the step of framing the decal reduces the productivity of the process of the '236 patent: a frame area on each side of the individual MLTF decal sections, or "chicklets," must be reserved for handling purposes. This requirement reduces the productive surface area on the carrier by up to fifty percent. Moreover, the carrier material is limited because it must be transparent to a pre-determined wavelength (i.e., 308 nm) of electromagnetic radiation.
U.S. Pat. No. 5,518,674 issued to Powell et al. describes a method of forming thin-film flexible interconnects for infrared detectors. The interconnect is removed from a substrate to form a free-standing film. When a polymer film is provided on a silicon substrate having a surface with either diluted or no adhesion promoter, the interconnect structure is removed from the substrate in hot water. A hot steam environment might be substituted for the hot water bath. In either case, the polymer absorbs water readily and swells sufficiently to break the polymer bond to the substrate. When the substrate surface preparation involves the use of a release layer, the interconnect structure is removed by soaking in an appropriate solvent which will dissolve the release layer. Because the MLTF fabrication requires immersion in various aqueous and solvent chemicals, however, a chemically insensitive release layer is desirable. Removal of the interconnect is accomplished by dissolving the substrate in an appropriate etchant if a metal substrate such as aluminum is used.
U.S. Pat. No. 5,534,466, issued to Perfecto et al. and assigned to the assignee of the present invention, also involves a process for transferring a thin-film wiring layer to a substrate in the construction of multi-layer chip modules. A sacrificial release layer is provided on the surface of a carrier. Then a thin-film structure is provided on the release layer. The thin-film structure has at least one dielectric material and at least one wiring path of electrically conductive material. At least a portion of the electrically conductive material is exposed on the surface of the thin-film structure opposite the carrier. Also provided are a substrate and a joining composition on one or both of the exposed electrically conductive surface of the thin-film structure or the substrate. The thin-film structure is applied to the substrate so that the attached carrier is remote from the substrate, and the thin-film structure and attached carrier are joined to the substrate. Finally, the release layer is contacted with an etchant for the release layer to remove the carrier from the thin-film structure.
The processes taught by Powell et al. in the '674 patent and Perfecto et al. in the '466 patent involve chemically etching a release layer. The etchant must be substantially inert to the dielectric layer and the electrically conductive layer of the thin-film structure. Otherwise, these layers must be protected against attack by the etchant. At least some dielectric and electrically conductive materials are highly susceptible to such attack. For example, aluminum etches readily. The requirement of chemically etching complicates the process of removing the interconnect from the processing substrate or carrier, therefore, and renders further processing more difficult.
To overcome the shortcomings of the conventional processes which remove an interconnect from a processing substrate or carrier, a new process for releasing a thin-film interconnect structure from a carrier substrate is provided. An object of the present invention is to provide a MLTF structure and process of fabrication which eliminate the need for additional framing as the MLTF structure is joined to an electronic packaging substrate. A related object is to provide an improved MLTF manufacturing process which increases the yield on the carrier substrate on which the MLTF structure is formed. Another object is to provide an improved process of transferring a MLTF structure to a substrate to form a single chip module (SCM) or MCM. It is still another object of the present invention to provide a method of manufacturing and joining a MLTF structure to a substrate which increases productivity while reducing costs. An additional object is to permit reuse of the carrier substrate after the MLTF structure has been released. Yet another object of this invention is to provide a MLTF structure which can be easily handled. The present invention also seeks to avoid the use of chemical etchants.